1. Technical Field
The present invention relates to a semiconductor substrate, to a semiconductor device, to a method of manufacturing a semiconductor substrate, and to a method of manufacturing a semiconductor device. More particularly, the present invention relates to a semiconductor substrate, which is suitable for a field effect transistor formed on a silicon-on-insulator (SOI) substrate, to a semiconductor device, to a method of manufacturing a semiconductor substrate, and to a method of manufacturing a semiconductor device.
2. Related Art
Field effect transistors formed on SOI substrates have attracted attention in view of their availability because of various advantages, such as the convenience of element separation, latch-up-free property, small source/drain junction capacitance, and the like. In particular, since a fully depleted-type SOI transistor has low power consumption, high-speed operation, and ease of low-voltage driving, an SOI transistor that can be driven in the fully depleted mode has been studied in earnest. Here, as the SOI substrate, for example, a SIMOX (Separation by Implanted Oxygen) substrate or a bonding substrate is used.
Further, for example, in M. Jurczak, T. Skotnicki, M. Paoli, B. Tormen, J-L. Regolini, C. Morin, A. Schittz, J. Martins, R. Pantel, and J. Galvier, “SON (Silicon On Nothing)—A NEW DEVICE ARCHITECTURE FOR THE ULSI ERA”, 1999 Symposium on VLSI Technology Digest of Technical Papers, pp. 29-30 (hereinafter, referred to as Non-Patent Document 1), a method has been disclosed in which a gate electrode is formed on a silicon-on-nothing (SON) substrate. That is, in this method, the gate electrode is formed on a semiconductor substrate that has a laminated structure of Si/SiGe/Si. Then, a Si/SiGe/Si layer on both sides of the gate electrode is etched so as to expose a SiGe layer on both sides of the gate electrode. Next, the SiGe layer is selectively removed by wet-etching, such that a cavity is formed below a Si layer on which the gate electrode is disposed. Subsequently, after epitaxial growth is selectively performed on both sides of the gate electrode, ion implantation is performed, such that source and drain layers are formed on both sides of the gate electrode.
However, in order to manufacture the SIMOX substrate, the ion implantation of oxygen with high concentration must be performed on a silicon wafer. Further, in order to manufacture the bonding substrate, after two silicon wafers are bonded to each other, the surfaces of the silicon wafers must be polished. For this reason, in the SOI transistor, there is a problem in that the manufacturing cost is increased, as compared to a field effect transistor formed in a bulk semiconductor.
Further, in the ion implantation or polishing, the variation in the film thickness of an SOI layer is large. Further, when the SOI layer is reduced in thickness in order to prepare the fully depleted-type SOI transistor, there is a problem in that characteristics of the field effect transistor are difficult to stabilize.
Further, in the method disclosed in Non-Patent Document 1, the SON structure is formed only below the gate electrode, while the SON structure cannot be formed in the source and drain regions. Accordingly, there is a problem in that the parasitic capacitance of the source or drain region cannot be reduced. Further, since the cavity below the Si layer, on which the gate electrode is disposed, serves as an air layer, the Si layer has many defects, and thus the mechanical strength or thermal conductivity deteriorates, as compared to the bulk semiconductor. In addition, there is a problem in that there is a lack of reliability.